Spin transfer torque-RAM is really cool, so I’m going to talk about it really quickly. This post assumes that you understand basic terminology like RAM, or electron spins. If you don’t, no worries! Ask Google and come back later! 🙂
As improvements to modern electronic devices approach fundamental limits, we have to start searching for new types of CMOS devices. We can’t shrink MOSFETs down much farther due to quantum tunneling starting to have really big effects along the channel and gate oxide when sizes get down to around 10nm, so we’re beginning the search for other technologies to come take the space of traditional FET technology. Leaky MOSFETs are sad MOSFETs.
Typically, electrons should bounce right off “energy barriers” like wires and the MOSFET gate oxide. However, we must treat electrons in the quantum space when we start to get super small and quantum tunneling becomes a very real problem where electrons “appear” on the other side of the barrier due to the probability waves.
One of the cool emerging technologies is in the space of spintronic devices–in contrast to traditional electronic devices that use level of electron charge to encode data, spintronic devices use the intrinsic angular momentum of an electron. (SO COOL).
Magnetic tunnel junctions (MTJ) are used in this process, where the magnetization direction of the storage layer corresponds to the state of the MTJ cell that we’re aiming for.
Typical MTJ device structure. We have two ferromagnetic layers (the storage layer and the reference layer) and an oxide layer in between that serves as the tunnel barrier.
When the storage and reference layers are in the same direction, the MTJ is in low resistance–or the ‘0’ state. In this vein, when the two ferromagnetic layers are in opposite directions, the MTJ is in high resistance/the ‘1’ state. By changing the magnetization direction of the storage layer, we can essentially encode a 0 or a 1 to the MTJ.
The STT part of STT-RAM comes from the way we change that magnetization direction of the upper storage layer. In magnetic RAM devices, magnetization is changed when orthogonal magnetic fields create an orthogonal magnetic field at the cross-point where the MTJ cell is. In order to write to an entire MRAM device, many orthogonal currents have to be sent across the whole thing, which often resulted in half-selected bits that are accidentally written.
With STT, we only need to write to the MTJ cells we want altered. By using polarized current, we can target cells we want changed.
In AP to P switching (a), electrons flow from the pinned layer to the free layer and electrons spinning in the same direction as the magnetization of the pinned layer remain in the pinned. In P to AP switching (b), electrons flow from the free layer to the pinned layer and electrons with the same spin direction as the pinned layer remain, but those that have opposite spins are reflected at the oxide layer and injected into the free layer.
When switching the magnetization directions of the ferromagnetic layers of an MTJ in a STT-RAM cell from parallel to anti-parallel (a), electrons flow from the
pinned layer to the free layer. Electrons spinning in the same direction as the magnetization of the pinned layer remain in the pinned layer and spin-polarizes the current. The spin-polarized current exerts STT on the free layer, and when the amount of spin-polarized current exceeds a threshold value determined by the Slonczewski equation, the magnetization direction of the anti- parallel layer switches.
For parallel to anti-parallel switching (b), electrons flow from the free layer to the pinned layer. Electrons with the same spin as the pinned layer pass though, but electrons with opposite spins are reflected at the boundary of the oxide layer and injected into the free layer. The reflected electrons exert STT on the free layer and switch the layer’s magnetization direction when the current has passed the threshold.
Now, why is STT-RAM such a good idea? Take a look at this handy chart!
Comparison of STT-RAM to contemporary memory technologies, where F is a process independent metric that denotes the smallest feature size of a cell in a given process technology. Notice that STT-RAM is advantageous in every category displayed.
STT-RAM has advantages over current memory like DRAM and SRAM, as it has similar structure and could be easily integrated into current chip designs, yet occupying much less chip space. Since STT-RAM is also non-volatile, it also serves as a possible Flash replacement due to the virtually unlimited number of write cycles STT-RAM can undergo before degradation.
Because it doesn’t rely on moving charge, STT-RAM requires very little voltage to read or write. Using STT-RAM in future technologies, both in mobile and large scale applications could greatly decrease power usage and bring in a new era of instant-on electronics! Imagine what we could do with huge L2 caches and terabytes of memory at your fingertips!
Haha, I bet in a couple of years, we’ll be complaining that the iPhone X only has 1 Tb of memory instead of the couple Gb we’re moaning over now. :,)
-Sophie
p.s: If this intrigues you, take a look a this paper I wrote for my Semiconductor Devices final project! It’s far from perfect, but given my first shot at professional writing, I’m pretty proud if it. 😀